Job Information
Broadcom IC Design Engineer (DFT) in Shanghai, China
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Job Description:
Responsibilities:
Participate in chip level DFT architecture definition.
Implement DFT schemes, including scan, boundary scan, Mem BIST and Logic BIST.
Verify all DFT logics and test patterns with simulation
Test modes static timing analysis
Participate in ATE bring-up and debug the DFT patterns on ATE.
Requirements/Qualifications:
Good understanding of the General DFT methodology such as BIST, SCAN, JTAG, ATPG and SSN
Be familiar with Mentor / Synopsys DFT flow and tools
Experience in developing constraints for synthesis/STA
Multi-mode, multi-corner STA experience in 16nm and lower technology nodes, Understanding Sign-Off Checks
Experience in silicon debug, diagnosis and yield improvement
Education/Certifications
Preferred Degree: MS Preferred Major: Microelectronics or related discipline
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