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TAD PGS, Inc. Network System Design Architect in San Jose, California

We have an outstanding career for opportunity for aNetwork System Design Architect to join a leading Company located in theSan Jose, CA surrounding area.

Salary: $200k -$300K

As a Network System Design Architect, you will play a pivotal role in bridging the gap between our customers and our R&D team. You will be responsible for understanding the technical needs of potential customers, engaging in detailed discussions with their hardware design engineers, and transferring key insights and requirements to our internal R&D team. A strong background in signal integrity (SI) design, particularly in the realm of high-performance network switches, is essential for this role.

The successful candidate will have experience working with advanced ASICs such as from Broadcom/Cisco/ Marvel. and a solid understanding of integrating these ASICs into high-performance networking products.

Job Responsibilities:

  • Customer Engagement: Serve as the primary technical contact for potential customers, particularly their hardware design engineers, to understand their requirements and challenges.

  • Internal Collaboration: Act as the liaison between the customer and our R&D team, ensuring clear communication of customer needs and technical specifications.

  • Hardware Design Support: Provide technical expertise on hardware design, with a focus on signal integrity (SI) challenges in high-performance networking switches.

  • ASIC Integration: Work closely with our hardware and ASIC teams to ensure smooth integration of ASICs, particularly Broadcom Tomahawk series, into our products.

  • Product Development: Participate in the design and development process of hardware products, ensuring that customer requirements are met and that designs are optimized for performance.

  • Technical Guidance: Provide mentorship and technical guidance to junior engineers on the team.

    Basic Hiring Criteria:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

  • 7+ years of experience in hardware design, with a focus on high-performance network systems.

  • Strong technical background in signal integrity (SI) design for networking hardware.

  • Experience working with ASICs

  • Proven ability to engage in detailed technical discussions with customers and translate those discussions into actionable insights for R&D teams.

  • Excellent communication and interpersonal skills, with the ability to effectively work across teams.

  • Good understanding of modern data center networks

  • Self-motivated, with a strong sense of ownership and responsibility.

    Desired Qualifications:

  • Experience in high-performance switch designs (100G/400G/800G).

  • Knowledge of hardware design lifecycle and product development processes.

  • Familiarity with power integrity (PI) challenges and thermal management in high-performance systems.

    Benefits offered vary by contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, and affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.

Military connected talent encouraged to apply.

VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled

To read our Candidate Privacy Information Statement, which explains how we will use your information, please visithttp://www.tadpgs.com/candidate-privacy/orhttps://pdsdefense.com/candidate-privacy/

The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:

  • The California Fair Chance Act

  • Los Angeles City Fair Chance Ordinance

  • Los Angeles County Fair Chance Ordinance for Employers

  • San Francisco Fair Chance Ordinance

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