Job Information
Texas Instruments Senior Packaging Engineer (Power Module) in Melaka, Malaysia
Change the world. Love your job.
As a Packaging engineer you will enjoy an environment of smart collaboration with a global team of the industry’s top engineering minds at your disposal. TI’s corporate culture is one of competitive spirit which fuels continued business growth and constant career opportunities. While ethical business practice is a central aspect of the work place-you will be treated with respect, dignity, kindness and courtesy.
2 available positions:
Power Module
Optimizing and establishing robust and high-speed process parameters for various component attach processes, stack-up, and molding (transfer or compression) technology
Defining simplified manufacturing process sequence for different components attach
Broad and deep technical understanding of PCB / Substrate / Laminate / MIS manufacturing.
Leaded Module
Optimizing and establishing robust and high-speed process parameters for multi chip attach processes, stack-up, and wire bonding technology
Defining simplified manufacturing process sequence for power stage package
Broad and deep technical understanding of leadframe / DBC / MIS manufacturing.
Responsibilities Include:
Managing multiple new product executions starting from kick-off, product prototyping, characterization, learning cycles, and qualifications until product released with engineering approach such as JMP analysis, FMEA, control plan, etc.
Collaborate closely with factory operations teams to meet manufacturing indices, quality standards, and cost entitlements
Engaging with global package platform and emerging technology team to execute differentiated technology roadmaps to establish process capabilities in front of needs
Enabling TI power modules package competitiveness through adopting the industry latest greatest capabilities and maximize package design flexibility for adapting the latest technology.
Work with multi function to enable stress modeling to understand the package design weak point and define the contingency plan to overcome it.
Why TI?
Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012)
Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us.
About Texas Instruments
Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .
Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment.
If you are interested in this position, please apply to this requisition.
Minimum requirements:
Bachelor’s degree in Mechanical Engineering, Physics, Material Science, or a related field of study
Minimum 5 years-experience in the semiconductor field
Expert level experience in process development for power stage, multi chip module.
Package layer design expertise such as structural configuration, material selection and process flow design
Hands on skills in operating machines and knowledge to down-select material, process optimization and yield improvement
Expert experience of using ANSYS / FEA for stress modeling.
Preferred qualifications:
Ability to engage with a geographically diverse team with a strategic vision to drive a complex technology roadmap.
Hands on experience on system-in-Package (SiP), including multi chip package or package on package is added advantage.
Knowledge of power stage packaging design, including understanding of Design for Manufacturability (DFM) constraints and defect criteria.
Experience in multi-process coordination and optimization (integration between SMT and back-end packaging processes)
Ability to establish strong and collaborative relationships with stakeholders, global design & manufacturing teams and component/material/substrate supplier to meet on-time execution
Knowledge in FMEA methodology, process control plan, statistical analysis, SPC and DOE methodology. Skilled in JMP statistical analysis software is an added advantage
Experience with assembly of power modules packaging, substrate design and reliability requirements
Project management experience in semiconductor industry specifically in Assembly Test or SMT Operation
Key personal characters – trustworthy, inclusive, innovative, competitive, result-oriented
ECL/GTC Required: Yes