Job Information
Safran FPGA Verification Engineer M/F in Kundalahalli, India
FPGA Verification Engineer M/F
Vacancy details
General information
Entity
Safran is an international high-technology group, operating in the aviation (propulsion, equipment and interiors), defense and space markets. Its core purpose is to contribute to a safer, more sustainable world, where air transport is more environmentally friendly, comfortable and accessible. Safran has a global presence, with 100,000 employees and sales of 27.3 billion euros in 2024, and holds, alone or in partnership, world or regional leadership positions in its core markets.
Safran is in the 2nd place in the aerospace and defense industry in TIME magazine's "World's best companies 2024" ranking.
Safran Electronics & Defense offers its customers onboard intelligence solutions allowing them to understand the environment, reduce mental load and guarantee a trajectory, even in critical situations, in all environments: on land, at sea, in the sky or space. The company harnesses the expertise of its 13,000 employees towards these three functions: observe, decide and guide, for the civil and military markets.
Reference
2026-170650
Position description
Domain
Research, design and development
Job field / Job profile
Electronics and automation - FPGA
Job title
FPGA Verification Engineer M/F
Employment type
Permanent
Part time / Full time
Full-time
Job description
Description of the Role:
In this role as a Lead Engineer (FPGA Verification Engineer, Actuation Systems) actively contribute towards requirement-based testing (RBT) in FPGA verification using System Verilog and UVM methodology, in accordance to DO-254 process.
FPGA JD:
Primary Responsibilities:
1.Develop an effective suite of tests and test environments using System Verilog UVM, based tests to achieve predefined requirement verification goals.
2.Develop test-plan, self-checking test-benches to meet the verification criteria and code coverage.
3.Participate in requirement validation and requirement review.
4.Protocols – PCIe, SPI, ARINC 429, Mil 1553, Image processing.
5.Actively participate in a team environment, working with verification, architecture, applications, and design teams to develop comprehensive verification plans and address issues.
6.Verification environment development/update for block level and system level.
7.Work closely with design team on design de-bugging, coverage gap analysis etc.
8.Verify structural and functional coverage of module and system level test suite.
9.Advanced skills in various programming languages such as System Verilog/UVM, PERL or any scripting language.
10.Apply techniques and skills required to identify a root cause of a given issue and very good debugging skills.
11.Technical guidance to the junior engineers on verification tasks.
Candidate skills & requirements
Qualifications:
•Bachelor's/Master's degree in Engineering (ECE , VLSI)
•4-8 years of Industry experience with experience in development, integration & verification of ASIC/FPGA.
•Hands on experience in developing SV UVM verification environment from scratch.
•Hands on experience with Questa or Modelsim or similar advanced simulation tools.
•Hands on experience in DO-254 verification process.
•Hands on experience in developing UVM verification environment from scratch from scratch with stimulus to achieve the code coverage, robust testing of the designs independently.
•Exposure to test plan generation, test bench writing, simulation of designs.
•Experience in RTL Design using VHDL, Complete FPGA development flow and FPGA verification using VHDL will be a plus.
•Experience in DOORS/Jama will be a plus.
•Excellent oral and written communication skills
Position location
Job location
Asia, India
City (-ies)
Kundalahalli, Bangalore
Candidate criteria
Minimum education level achieved
Bachelor's Degree
Minimum experience level required
More than 5 years