Job Information
Cadence Design Systems, Inc. Lead Digital Verification Engineer in Edinburgh, United Kingdom
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Lead Digital Verification Engineer
Location: Edinburgh
Reports to: Design Engineering Group Director
Job Overview:
The Cadence Silicon Systems Group (SSG) develops leading edge Intellectual Property (IP) for a variety of High-Tech Markets. As a member of the Central Engineering Team within SSG, you will be responsible for defining and supporting the adoption of cutting-edge verification tools and methodologies with a focus on AI and Machine Learning. You will have a horizontal role working with multiple projects and teams to accelerate adoption of latest verification best practices.
The Lead Verification Engineer will be based in Edinburgh, Scotland as part of an experienced digital design and verification IP team.
Job Responsibilities:
Develop and support adoption of generative AI tools to create and update, UVM and Formal verification environments
Develop methodology guidance and end to end flows to ensure AI tools used in a consistent, efficient and predictable way
Develop and roll out solutions that reduce verification debug time
Automate documentation checking to improve quality and consistency
Build tools and processes to support verification planning
Optimise UVM regressions through improved automation and machine learning
Maintain and develop best practices for Functional Safety Verification, Gate Level Simulation and Low Power Verification
Maintain and improve design review checklists and quality documentation
Job qualifications and required skills:
Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline
4+ years experience in the microelectronics/EDA industry
Proficiency in System Verilog and assertions
Hands-on experience with Metric Driven Verification (MDV)
Strong knowledge of constrained-random verification techniques (e.g. UVM)
Excellent spoken and written English
Self-motivated, with strong planning, interpersonal, and communication skills
Additional Skills/Preferences:
Formal verification experience and related applications
Proficiency with scripting languages (e.g. Python)
Knowledge of AI agent development (tools, concepts, and infrastructure)
Methodology development and change management experience
Familiarity with front-end design tools (e.g. LINT, CDC analysis)
Exposure to quality processes and standards (e.g. ISO 9001, ISO 26262)
Additional Information:
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Check what we can offer you:
Competitive salary
25 days holiday per year
Private Medical and Dental plans, Income Protection and Life Insurance
Group Personal Pension Plan
Cycle to work scheme and gym subsidy
5 days paid time to volunteer to give back to our communities
Employee Stock Purchase Plan
The opportunity to work for a Great Place to Work© & Fortune 100 organization
Travel: <5%
We’re doing work that matters. Help us solve what others can’t.
Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl_jobs)
Equal Employment Opportunity Policy:
Cadence is committed to equal employment opportunity throughout all levels of the organization.
- Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/equal-employment-opportunity-policy.pdf)
We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.
Privacy Policy:
Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en_US/home/privacy/privacy-policy.html) .
E-Verify Cadence participates in the
E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/e-verify-participation-poster.pdf)
Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.