Job Information
QUALCOMM Hardware (CPU, GPU, SoC, Digital Design, DV) Engineering Internship in Chandler, Arizona
This job was posted by https://www.azjobconnection.gov : For more information, please see: https://www.azjobconnection.gov/jobs/7418993
Role Overview
As a QualcommHardware Engineering Intern,youll have the opportunity to push the boundaries of what exists and help establish the new standards for tomorrow. You will leverage your electrical and/or computer engineering degree to work on one of the following Qualcomm multi-disciplinary teams: System (architecture, modeling, power, thermal, silicon profiling), Front-end Design (micro-architecture, modeling, RTL), Implementation (synthesis & timing constraints), Design-for-Test (DFT), Physical Design (place & route, CTS, timing closure), Pre-silicon Verification (DV), Emulation, Post-silicon Validation (VI), CAD, and GPU Design.
This internship supportsmultiple technical tracks, including:
GPU Engineering
CPU Engineering
Digital Design / DV
SoC Systems Engineering
Based on your resume you may be aligned to one or more of these tracks.Please clearly indicate your track interest(s) in your resume, as this is the only way to communicate preferences during the recruiting process.
Minimum Qualifications
Currently enrolled in a bachelors, masters, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field
Must be available for1114 weeksduringSummer 2026 (MaySeptember)
Expected graduation date ofNovember 2026or later
1+ years of academic experience with programming languages such as C, C++, Python, Perl, Verilog, SystemVerilog
Preferred Qualifications
Candidates actively pursuing a degree with an anticipated graduation betweenNovember 2026and June 2027
Currentlyenrolled in a Masters or PhD degree programin computer engineering, electrical engineering, or a related field
Track 1: GPU Engineering
Engineering design and development in MSM SOC and chipset architecture
ASIC implementation of image processing camera IP
GPU pipeline validation (stimulus generators, checkers, monitors, drivers, models)
Graphics power analysis & optimization (Vulkan)
Familiarity with multimedia or communication technologies including audio/video codecs, camera, WLAN, LTE, and 5G
Programming experience in C, Perl, Verilog, SystemVerilog, C++, Python
Track 2: CPU Engineering
Validation of CPU and SOC-level micro-architecture concepts
Development of test and coverage plans, verification methodology, and scalable environments
Execution of verification plans including regression, debug, and bring-up
Familiarity with simulators, coverage tools, waveform viewers
Programming experience in C, C++, Python
Track 3: Digital Design / DV
RTL development for modem physical and MAC layer processing
Verification component development using SystemVerilog and UVM
Modeling cellular modem datapaths for bit-exact correctness
Knowledge of digital design, DSP, wireless communication, LTE, 5G, Wi-Fi
Exposure to machine learning concepts as applied to digital signal processing or modem architecture is a plus
Programming experience in C, Python, Perl, Verilog, SystemVerilog, C++, Matlab
Track 4: SoC Systems Engineering
Concepts in computer architecture (CPU, GPU, DSP, interconnects, MMUs, etc.)
System-level performance modeling and simulation
Power and thermal management strategies
Post-silicon validation and characterization
Embedded software design, driver development for Linux/Windows
OS principles and HW/SW interaction
Experience supporting or optimizing machine learning workloads on embedded systems or accelerators
Understanding of power/perform nce tradeoffs and system-level architecture
Programming experience in C/C++, Python; scripting and profiling tools
Qualcomms Internship Program
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